Low standby loss is becoming a basic requirement for power supplies. Generally, there are two methods to achieve this requirement. One method is to reduce the operating frequency of a power converter, and the other one is to operate a power converter in a burst mode. When in the burst mode, the converter operates in several continuous switching cycles and then follows a no switching time period. With this means, the equivalent switching cycles in a certain time is low and thus the standby loss of the converter, mainly including the switching cycle related power loss, is low.
Please refer to FIG. 1. FIG. 1 is a block diagram of a conventional power converter having a normal operation mode and a standby mode according to the prior art. The power converter circuit includes a main circuit 10, a main control circuit 12, and a standby controller 14a. The main control circuit 12 includes a normal operation controller 12a and an error amplifier 12b. Accepting the output voltage of the power converter as its input, the error amplifier 12b outputs an error-amplified voltage VE/A.
In the normal operation mode, the normal operation controller 12a provides a driving signal Snormal to the main circuit 10. And in the standby operation mode, the standby controller 14a provides a driving signal Sstandby to the main circuit 10.
As for a PWM converter with diode rectifier at its output side, the error-amplified feedback voltage VE/A in the standby operation mode is very different from that in the normal operation mode. Meanwhile, VE/A changes obviously with load in the standby operation mode. So VE/A can be utilized to identify the loading condition of a PWM converter, and can be applied to the light load conditions for selecting the standby controller and for achieving the low standby loss of a power supply.
But in some kinds of converters and even in case of the PWM converter with synchronous rectifier, VE/A changes little with the load and it becomes an impractical approach to running the converter in the burst mode under light load conditions by sensing the VE/A signal.
Because of the technical defects described above, the applicant keeps on carving unflaggingly to develop a general approach to achieve a power supply having efficient low power standby mode through wholehearted experience and research.